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 Head of Engineering(VP level)-SoC ASIC Design--Beijing |
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xiaohui
头衔: 海归少校
加入时间: 2004/02/20
文章: 207
海归分: 20138
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作者：xiaohui 在 海归招聘 发贴, 来自【海归网】 http://www.haiguinet.com
Hi,
We have a Head of Engineering(Beijing) and Physical Design manager(Santa Clara) positons from a US semiconductor company.
If you are interested in it, please send your resume to [email protected]
*Team Lead/Manager of Physical Design
Working Place: Santa Clara (requires frequent travel to Beijing)
5+ years of experience in ASIC backend design flow
hands-on knowledge of synthesis, floor-planning, place-and-route, physical verification, signal integrity tools
project management experience is preferred
experience dealing with silicon foundries and packaging vendors is desirable
willingness to travel to Beijing as projects require is a must
*Head of Engineering(VP level)
Location: Beijing
Report to CEO directly
Our company provides semiconductor products in the consumer and communication markets. The company offers chipsets and reference design technologies for digital video/audio signal processing, network/communication, analog/mixed signal and RF ICs. We have research development teams in both Beijing and Silicon Valley.
Requirements:
MSEE required.
At least 5+ year’s direct experience in SoCs or ASIC design (Video, Graphics, CPUs, etc.)
And 2+ iterations of SoC chip design cycles from scratch.
Ideally some experience in managing large design teams with track record of delivering complex SoC designs from concept into production, including all phases of design, architecture, micro-architecture, design verification and COT implementation flow
Strong project management skills and process-oriented
Good people skills and communication skills.
作者：xiaohui 在 海归招聘 发贴, 来自【海归网】 http://www.haiguinet.com
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 Head of Engineering(VP level)-SoC ASIC Design--Beijing -- xiaohui - (1591 Byte) 2006-2-02 周四, 12:08 (730 reads)
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